Quantum Valley Ideas Laboratories

Published purpose

Despite their unmatched precision, modern laboratory optical clocks like the strontium lattice clock are unlikely to become portable in the near future. Many important applications, e.g., radar, communications, and navigation, require fieldable devices with volumes of <50 liters and fractional frequency instabilities that are ≤ 10-13 /√τ. √τ is the square root of the integration time, i.e., clocks with 1s instabilities of around 10-13. For modern technological needs, compact portable optical clocks are the best candidates for low frequency instability, but current models, which achieve 10⁻¹³/√τ performance, are costly, not available for general purchase, and have no Canadian vendors. Currently, QVIL is developing a two-photon Cesium (Cs) optical clock for stabilization of a gravimeter. The current setup has demonstrated an instability of < 5 x 10-13/ √τ after around one year of work. The Project seeks to take the promising results obtained so far on the Cs two-photon clock and develop a portable, two-photon Cs optical clock to replace active Hydrogen masers. QVIL’s product will be improved to surpass the maser's accuracy. The Project team focuses on accelerating the design for a vapor cell capable of collecting the maximum amount of fluorescence, increasing the signal-to-noise of the optical frequency reference which is inversely proportional to the instability of the clock. Improving the signal-to-noise allows laser power to be reduced which decreases Stark shifts, a major limitation of current optical clocks. The Project team works to accelerate the integration of proprietary Kerr frequency combs, for converting the optical frequency to countable radio frequencies, with the optical frequency reference. The Project develops a plan for improvements in size, weight power and cost (SWaP-C) reduction of the clock. Post-project, QVIL will launch a spin-off to manufacture the Cs optical clock in Canada, establish a precision timing company for diverse applications, and pursue follow-on projects to shrink the device to chip scale.